This invention relates in general to techniques for regulating or stiffening a voltage and, more particularly, to techniques for regulating or stiffening a voltage within an integrated circuit.
When implementing most circuits, it is a relatively standard practice to provide a plurality of capacitors which each have two ends coupled to respective conductive strips. These conductive strips are frequently called xe2x80x9crailsxe2x80x9d, and carry respective different direct current voltage potentials from a power supply. The capacitors serve to regulate or xe2x80x9cstiffenxe2x80x9d the supply voltage by eliminating high frequency signal components, including high frequency components induced in the supply voltage by normal operation of the circuitry powered by the supply voltage.
In the context of an integrated circuit, where the voltage stiffening capacitors are parts of the integrated circuit, the capacitors are commonly implemented by providing scattered regions within the integrated circuit which are not used for the operational circuit, and then implementing in each such region a single voltage stiffening capacitor which is as large as possible. Due to process variations or other factors, one or more of the voltage stiffening capacitors in an integrated circuit may have a defect which permits a leakage current of relatively large magnitude to flow therethrough. Such defects typically arise during fabrication of the integrated circuit. However, in some cases such a defect may develop during operational use of the integrated circuit, long after it has been fabricated.
From the foregoing, it may be appreciated that a need has arisen for a method and apparatus for preventing or limiting leakage current in a voltage stiffening capacitor in an integrated circuit. A first form of the present invention involves an integrated circuit which includes: first and second conductive parts operable to respectively carry first and second supply voltages that are different; and a plurality of voltage stiffening circuit portions which each have first and second nodes respectively coupled to the first and second conductive parts, each of the circuit portions including a capacitance and a current limiting section coupled in series with each other between the first and second nodes thereof, each such current limiting section being selected so that application thereacross of a voltage equal to the difference between the first and second supply voltages would induce through the current limiting section a current flow less than approximately 10 mA.
A second form of the present invention involves an integrated circuit which includes: first and second conductive parts operable to respectively carry first and second voltages which are different; and a plurality of voltage stiffening circuit portions disposed within a contiguous area of the integrated circuit which is free of circuitry other than the circuit portions, the circuit portions each having first and second nodes respectively coupled to the first and second conductive parts, and each including a capacitance and a current limiting section coupled in series with each other between the first and second nodes thereof.
Yet another form of the present invention involves an integrated circuit which includes: first and second conductive parts operable to respectively carry first and second voltages which are different; and a plurality of voltage stiffening circuit portions which each have first and second nodes respectively coupled to the first and second conductive parts, each of the circuit portions including a capacitance and a current limiting section coupled in series with each other between the first and second nodes thereof, wherein the capacitances of the circuit portions each include first and second conductive portions separated by a non-conductive portion, the first conductive portions being electrically separate from each other, and the second conductive portions being respective integral portions of a single conductive member.
Still another form of the present invention involves an integrated circuit which includes: a dynamic random access memory section having a plurality of memory cells which each include a capacitor; first and second conductive parts operable to respectively carry first and second voltages which are different; and a plurality of voltage stiffening circuit portions which each have first and second nodes respectively coupled to the first and second conductive parts, each of the circuit portions including a capacitor and a current limiting section coupled in series with each other between the first and second nodes thereof, the capacitors of the circuit portions each having a structural configuration which is equivalent to a structural configuration of the capacitors in the dynamic random access memory section.
Another form of the present invention involves an integrated circuit which includes: first and second conductive parts operable to respectively carry first and second voltages which are different; a plurality of voltage stiffening circuit portions which each have first and second nodes respectively coupled to the first and second conductive parts, each of the circuit portions including a capacitance and a transistor coupled in series with each other between the first and second nodes thereof, each transistor having a control terminal which is responsive to application thereto of a control signal for controlling a current flow between the first and second nodes through the transistor as a function of the control signal applied thereto; and a circuit portion coupled to the control terminal of each transistor for applying thereto a control signal.
Yet another form of the present invention relates to fabrication of an integrated circuit which includes first and second conductive parts operable to respectively carry first and second supply voltages that are different, and a plurality of voltage stiffening circuit portions that each have first and second nodes respectively coupled to the first and second conductive parts, each of the circuit portions including a capacitance and a resistance coupled in series with each other between the first and second nodes thereof. Fabrication of the integrated circuit involves: providing a substrate; forming in the substrate a portion which extends between spaced first and second locations on the substrate and which implements the resistance; forming an insulating layer over the substrate; forming first and second openings in the insulating layer which respectively extend to the first and second locations; forming conductive first and second contacts in the first and second openings, the first and second contacts being respectively electrically coupled to the substrate at the first and second locations; forming in the insulating layer a recess which is spaced from the substrate, one of the first and second contacts having an upper portion which projects into the recess and the other of the contacts being spaced from the recess; forming on exposed surfaces of the recess and the one of the contacts a first conductive layer; forming a non-conductive layer on the first conductive layer; forming a second conductive layer on the non-conductive layer, the first and second conductive layers and the non-conductive layer collectively forming a capacitor which provides the capacitance of the circuit portion; and forming the first and second conductive parts so that one thereof is electrically coupled to the second conductive layer and the other thereof is electrically coupled to the other of the first and second contacts.
Still another form of the invention relates to fabrication of an integrated circuit which includes first and second conductive parts operable to respectively carry first and second supply voltages that are different, and a plurality of voltage stiffening circuit portions that each have first and second nodes respectively coupled to the first and second conductive parts, each of the circuit portions including a capacitance and a resistance coupled in series with each other between the first and second nodes thereof. Fabrication of the integrated circuit involves: providing a substrate; forming in the substrate spaced source and drain regions which have respective portions respectively disposed at spaced first and second locations on the substrate, the resistance being provided by a portion of the substrate which extends between the first and second locations; forming first and second insulating layers, the first insulating layer being provided over the substrate between the source and drain regions, and the second insulating layer being provided over the substrate above one of the first and second locations; forming a conductive gate section over the first insulating layer; forming a further conductive section over the second insulating layer, the further section, the second insulating layer and the one of the source and drain regions serving as a capacitor which provides the capacitance of the circuit portion; and forming the first and second conductive parts so that one thereof is electrically coupled to the further conductive section and so that the other thereof is electrically coupled to the substrate at one of the first and second locations which is spaced from said second insulating layer.